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电子线路CAE/EDA2025|PDF|Epub|mobi|kindle电子书版本百度云盘下载
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- 朱文嘉,黄智勇编 著
- 出版社: 重庆:重庆大学出版社
- ISBN:7562440042
- 出版时间:2007
- 标注页数:230页
- 文件大小:30MB
- 文件页数:237页
- 主题词:电子电路-高等学校-教材
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图书目录
Preface1
Chapter 1 Introduction to Protel7
1.1 First Coming into Protel7
1.1.1 Development7
1.1.2 Windows of Protel8
1.1.3 Composing of Protel8
1.1.4 Machine Hardware Demand for Protel10
1.1.5 Documents in Protel11
1.2 Environment Setting12
1.2.1 Protel Servers12
1.2.2 System Preferences13
1.2.3 Design Teams14
Chapter 2 Schematic Design in Protel17
2.1 Process of Simple Schematic Design17
2.1.1 Settings for Schematic Design18
2.1.2 Preparing Components20
2.1.3 Place and Align Component26
2.1.4 Annotation the schematic31
2.1.5 Schematic Design Verification—the ERC33
2.1.6 Generating a Schematic Netlist35
2.2 Design of Complex Schematic39
2.2.1 Introduction39
2.2.2 Hierarchical Methods for Complex Design39
2.2.3 ERC on a Multi-Sheet42
2.3 Create or Edit Our Own Schematic Component48
2.3.1 Introduction to Library Editor48
2.3.2 Create Our Own Component Library50
2.3.3 Properties of Component52
Chapter 3 PCB Design in Protel55
3.1 Foreword of PCB55
3.1.1 Have a Knowledge of PCB55
3.1.2 Operating on PCB56
3.2 Process of PCB Design57
3.2.1 The Interface Between Schematic and PCB58
3.2.2 Working Environment Settings59
3.2.3 PCB Design Objects62
3.2.4 Load Netlist66
3.2.5 Positioning PCB Components74
3.2.6 PCB Design Rules79
3.2.7 Autorouting a PCB81
3.2.8 PCB Design Rule Checker(DRC)85
3.3 PCB Footprint Libraries87
3.3.1 PCB Libraries87
3.3.2 Footprint Making89
3.4 Recommend Some Protel Methods for Product Design93
Chapter 4 Simulations in Protel95
4.1 Introduction of Schematic Simulation95
4.1.1 Introduction of Simulation95
4.1.2 Components for Simulation96
4.1.3 Setting up for Simulation Displaying108
4.2 Stimulation by Protel109
4.2.1 Stimulation by Protel109
4.2.2 Waveform Analysis Viewer121
4.2.3 Examples for Stimulation122
4.2.4 Checking the Signal Integrity of a PCB126
Chapter 5 Simple Introduction to PowerLogic and PowerPCB133
5.1 Introduction133
5.1.1 New Functionality in Powers133
5.1.2 The Powers of Windows135
5.1.3 Document Management in Powers136
5.1.4 Hot key in Powers137
5.1.5 Design Flow Chart in Powers142
5.2 Design in Powers143
5.2.1 Settings143
5.2.2 Component Libraries148
5.2.3 Schematic Design153
5.2.4 Communication between Powers155
5.2.5 PCB Design158
5.3 Loading Netlist from Protel 99 in PowerPCB167
Chapter 6 Introduction to FPGA168
6.1 Summary of Hardware Description Language168
6.1.1 Brief Introduction168
6.1.2 Basic Program Structure of VHDL169
6.2 VHDL Fundament172
6.2.1 Definition of VHDL Data172
6.2.2 VHDL Arithmetic Operators176
6.3 VHDL Statements179
6.3.1 Summing up VHDL Statements179
6.3.2 Parallel VHDL179
6.3.3 Sequential VHDL184
6.4 Design Improvement194
6.4.1 Combinational Logic Circuit194
6.4.2 Sequential Logic Circuit202
6.5 Quartus Ⅱ Software Development208
6.5.1 Brief Introduction to the Software208
6.5.2 Design Flow209
6.5.3 Creating a Project209
6.5.4 Design Entry213
6.5.5 Compilation219
6.5.6 Simulation221
6.5.7 Configure/Program226
参考文献230
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